Board features

1. STM32F469NIH6 microcontroller featuring ARM Cortex-M4 core and 324 Kbytes of RAM
2. 4” TFT Color LCD Touch Display
3. 128-Mbit SDRAM
4. 128-Mbit QSPI NOR Flash

Supported color depths

The reference port for this board supports 16bpp and 24bpp (default) color depths. The board also supports 32bpp, but it is not implemented in the reference port. See QUL_COLOR_DEPTH and Color depth for more information.

Partial framebuffer support

This board supports the partial framebuffer strategy. To enable it, set QUL_PLATFORM_PARTIAL_FRAMEBUFFER and rebuild the Platform library.

Using the partial framebuffer can significantly lower the memory requirements of an application, but can lead to reduced performance and potential visual tearing artifacts for complex applications.

Prebuilt demos and examples

Package for STM32F469I-DISCO board is provided with following prebuilt demos:

• thermo

You can flash them onto the device using images from the demos_images folder. Follow the flashing instructions for ST boards, and use STM32469I-DISCO as the board name and N25Q128A_STM32469I-DISCO as the external loader script.

Reading debug messages

By default, the output of qul_printf and Qul::PlatformInterface::log calls are redirected to a virtual serial port, which is exposed on the host machine via USB.

Hardware acceleration

The reference port utilizes the STMicroelectronics Chrom-Art Accelerator (DMA2D) for hardware accelerated graphics.

DMA2D is a specialized direct memory access (DMA) accelerator dedicated to image manipulation. It can perform the following operations:

• Fill an image with a specific color.
• Copy a source image into a destination image.
• Copy a source image into a destination image with a pixel format conversion.
• Blend two complete source images, each with a different pixel format, and copy the result into a destination image with a different pixel format.

All of the listed operations can be done to a part or whole image.

For more information, refer to STMicroelectronics' documentation:

• STM32F7 - Chrom-ART (applies also for the STM32F4 series).
• RM0386 Reference manual section Chrom-Art Accelerator controller (DMA2D).

Hardware configuration

For more information about the STM32F469NIH6 MCU-specific peripherals mentioned below, refer to STMicroelectronics' documentation:

• 32F469IDISCOVERY Discovery kit with STM32F469NI MCU
• RM0386 Reference manual

STM32CubeMX

The hardware configuration for the STM32F469I-DISCO board is comprised of STM32CubeMX generated code and peripheral BSP drivers from the repository for STM32Cube MCU Package for STM32F4 series.

All the STM32CubeMX generated code (except the system clock configuration is located in the stm32f469i-discovery-baremetal/3rdparty/Core folder.

System clock configuration

The system clock configuration is located in the Qt Quick Ultralite platform source file stm32f469i-discovery-baremetal/platform_clock.cpp. The SystemClock_Config() function is declared weak, so that it can be overridden by a custom clock configuration.

System timer configuration

The TIM6 timer instance is configured as the timebase source in the Qt Quick Ultralite platform source file stm32f469i-discovery-baremetal/3rdparty/Core/Src/stm32f4xx_hal_timebase_tim.c with the HAL_InitTick() function.

The low layer (LL) SysTick_Handler() function is defined in the Qt Quick Ultralite platform source file stm32f469i-discovery-baremetal/3rdparty/Core/Src/stm32f4xx_it.c.

Interrupt handlers

The low layer (LL) processor exception and peripheral interrupt handlers are defined in stm32f469i-discovery-baremetal/3rdparty/Core/Src/stm32f4xx_it.c.

The hardware abstraction layer (HAL) interrupt handlers for the display serial interface host (DSI) interrupt callbacks, and the touch interrupt pin callback are defined in the stm32f469i-discovery-baremetal/platform_irq.cpp Qt Quick Ultralite platform source file.

Chrom-ART Accelerator (DMA2D)

The DMA2D configuration is defined in the platform/boards/st/common/platform_drawing.cpp Qt Quick Ultralite platform source file.

The nested vectored interrupt controller (NVIC) and clock configuration for DMA2D are defined in the STM32Cube MCU package repository file, Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c.

Display

You can find the LCD-TFT display controller (LTDC) and display serial interface host configuration settings in the stm32f469i-discovery-baremetal/platform_display.cpp Qt Quick Ultralite platform source file.

You can use the setLcdClockConfiguration() function to give the clock settings for LTDC.

The LTDC clock enabling and GPIO configuration settings are defined in the STM32Cube MCU package repository file, Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_lcd.c.

Quad serial peripheral interface (QSPI)

For the QSPI configuration, check BSP_QSPI_Init() for peripheral settings and QSPI_MspInit() for pinout/clock configuration from the STM32Cube MCU package repository file Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_qspi.c.

The QSPI is configured to memory-mapped mode in the Qt Quick Ultralite platform source file stm32f469i-discovery-baremetal/platform_init.cpp.

Random number generator (RNG)

You can find the random number generator (RNG) initialization in Qt Quick Ultralite platform source file platform/boards/st/common/platform_rng.cpp.

The clock configuration for the RNG hardware instance is located in 3rdparty/Core/Src/stm32f4xx_hal_msp.c.

SDRAM

The SDRAM BSP configuration is located in the STM32Cube MCU package repository file Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_sdram.c.

Touch panel

The touch panel configuration is located in the STM32Cube MCU package repository file Drivers/BSP/STM32469I-Discovery/stm32469i_discovery_ts.c.

The touch panel driver IC is connected to the I2C1 hardware instance and the touch interrupt signal is connected to the GPIOJ pin 5.

The I2C1 configuration is in a function called I2C1_Init(), which is located in the STM32Cube MCU package repository file Drivers/BSP/STM32469I-Discovery/stm32469i_discovery.c.

USART

The USART3 hardware instance is used for logs over the virtual COM port. The USART3 configuration including GPIO and clock settings is located in the Qt Quick Ultralite platform source file stm32f469i-discovery-baremetal/3rdparty/Core/Src/usart.c.

Known issues or limitations

• Due to limited SDRAM bandwidth, accessing SDRAM with the CPU may cause visual artifacts while the framebuffer is being scanned by the display controller, due to LTDC FIFO Underrun. LTDC FIFO Underrun error may occur in applications that have a lot of UI elements and heavy animations, causing visual glitches. Apart from simplifying the UI, consider using a different build type for the Qt Quick Ultralite core library. For example, Debug or Release instead of MinSizeRel.
• STM32F469NI does not have double-precision floating-point support.

RLE decompression

The CPU on this board cannot blend compressed images directly onto the framebuffer in SDRAM. Such images are decompressed into intermediate buffers of a limited size, before blending them using DMA2D onto the framebuffer in SDRAM. This approach has a significant performance overhead to blend RLE-compressed images compared to the uncompressed images.

Performance can be improved to some degree by increasing the size of qul_scratch_buffer in platform_stm32.cpp, at the cost of more RAM usage.