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EK-RA6M3G Getting Started on STM

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EK-RA8D1 Kit

This topic provides board-specific information about Renesas' EK-RA8D1.

Board features

  • R7FA8D1BHECBD MCU featuring ARM® Cortex®-M85, 2 MB Flash, 1 MB SRAM
  • 4.5” 480x854 LCD Touch Display
  • 64 MB SDRAM
  • 64MB External Octo-SPI Flash

Supported color depths

The reference port for this board supports 16bpp color depth. See QUL_COLOR_DEPTH and Color depth for more information.

Building applications with prebuilt Qt Quick Ultralite libraries

  1. Open the CMake project file for the example you want to build.
  2. In the Configure Project window:
    1. Select the kit you created earlier. For example, Qt for MCUs 2.10.0 - Desktop 32bpp.
    2. Select Configure Project.

{MCU project configuration}

Once the project is configured, select Run or press Ctrl+r on your keyboard to build and flash the binary to the target.

Reading debug messages

By default, log data is redirected to JLink CDC UART Port (USB COM port).

Port settings

SettingValue
Bits per second115200
Data bits8
ParityNone
Stop bits1
Flow controlNone

Debugging

Renesas e2 studio

Renesas e2 studio lets you debug a project using a custom configuration.

  1. Create a Bare Metal - Minimal project for EK-RA8D1.
  2. Build the project.
  3. Copy the Qt Quick Ultralite .elf file into the Debug folder of the e2 studio project.
  4. Take a copy of the original .sbd file and rename it with same name as the Qt Quick Ultralite .elf file.
  5. Select Run from the top menu.
  6. Select Debug Configurations....
  7. Select Renesas GDB Hardware Debugging.
  8. Set the Qt Quick Ultralite .elf to the C/C++ Application:.
  9. Select Apply and Close.
  10. Select Launch in 'Debug' mode.

Default FSP Configuration in Renesas e2 studio

Note: Use the default value for the property if not specified in the table.

BSP

PropertyValue
RA Common > Main stack size (bytes)65536
RA Common > Heap size (bytes)262144

Clocks

Clock settingValue
SCICLK SrcPLL1P
PLL2 SrcXTAL
PLL2 Mulx40.0
LCDCLK SrcPLL2P
OCTASPICLK SrcPLL2P

Note: SCICLK should be 120MHz

Note: LCDCLK should be 200MHz

Note: OCTASPICLK should be 100MHz

Stacks

Add the following stacks and configure them:

Analog > ADC (r_adc)

PropertyValue
Module > General > Nameg_adc0
Module > Input > Channel Scan Mask > Channel 2Selected
Pins > AN02P006

Connectivity > I2C Master (r_iic_master)

PropertyValue
Module > Nameg_i2c_touch
Module > Channel1
Module > RateStandard
Module > Rise Time (ns)120
Module > Fall Time (ns)120
Module > Duty Cycle (%)50
Module > Slave Address0x00
Module > Address Mode7-bit
Module > Timeout ModeShort Mode
Module > Callbacktouch_i2c_callback
Module > Interrupt Priority LevelPriority 6
Pins > SCL1P512
Pins > SDA1P511

Connectivity > UART (r_sci_b_uart)

PropertyValue
Module > General > Nameg_uart0
Module > General > Channel9
Module > General > Data Bits8bits
Module > General > ParityNone
Module > General > Stop Bits1bit
Module > Interrupts > Callbackuser_uart_callback
Pins > RXD9PA15
Pins > TXD9PA14

Graphics > D/AVE 2D Port Interface (r_drw)

PropertyValue
Common > Allow Indirect ModeEnabled
Common > Memory AllocationCustom
Module D/AVE 2D Port Interface (r_drw) > D2 Device Handle Named2_handle0
Module D/AVE 2D Port Interface (r_drw) > DRW Interrupt PriorityPriority 2

Graphics > Graphics LCD (r_glcdc)

PropertyValue
Module > General > Nameg_display0
Module > Interrupts > Callback Functionglcdc_callback
Module > Interrupts > Line Detect Interrupt PriorityPriority 12
Module > Input > Graphics Layer 1 > General > Horizontal size480
Module > Input > Graphics Layer 1 > General > Vertical size854
Module > Input > Graphics Layer 1 > Framebuffer > Number of framebuffers2
Module > Input > Graphics Layer 1 > Framebuffer > Section for framebuffer allocation.sdram
Module > Output > Timing > Horizontal total cycles559
Module > Output > Timing > Horizontal active video cycles480
Module > Output > Timing > Horizontal back porch cycles5
Module > Output > Timing > Horizontal sync signal cycles2
Module > Output > Timing > Horizontal sync signal polarityLow active
Module > Output > Timing > Vertical total lines894
Module > Output > Timing > Vertical active video lines954
Module > Output > Timing > Vertical back porch lines20
Module > Output > Timing > Vertical sync signal cycles3
Module > Output > Timing > Vertical sync signal polarityLow active
Module > Output > Timing > Data Enable Signal PolarityHigh active
Module > Output > Timing > Sync edgeFalling edge
Module > Output > Format > Color format24bits RGB888
Module > TCON > Hsync pin selectLCD_TCON1
Module > TCON > Vsync pin selectLCD_TCON0
Module > TCON > Panel clock division ratio1/8

MIPI Display (r_mipi_dsi)

PropertyValue
Module > General > Nameg_display0
Module > Low Power > Ultra Low Power State Wakeup Period290

MIPI Physical Layer (r_mipi_phy)

PropertyValue
Module > DSI PLL Frequency560

Input > External IRQ (r_icu)

PropertyValue
Module > Nameg_touch_irq
Module > Channel3
Module > TriggerFalling
Module > Digital FilteringEnabled
Module > Digital Filtering Sample ClockPCLK / 64
Module > Callbacktouch_irq_cb
Module > Pin Interrupt PriorityPriority 5

Note: Ensure that the mode of pin P510 is Output mode (Initial Low). The mode is changed to Input mode during the GT911 initialization process.

Storage > OSPI Flash (r_ospi_b)

PropertyValue
Common > Memory-mapping Support > Prefetch FunctionEnable
Common > Memory-mapping Support > Combination Function64 Byte
Common > Memory-mapping Support > XiP SupportDisable
Common > DMAC SupportEnable
Common > Autocalibration SupportEnable
Common > DOTF SupportDisable
Module > General > Nameg_ospi_b
Module > General > Channel1
Module > General > Initial Protocol ModeSPI (1S-1S-1S)
Module > General > Initial Address Bytes4
Module > General > Write Status Bit0
Module > General > Write Enable Bit1
Module > General > Sector Erase Size4096
Module > General > Block Erase Size262144
Module > General > Command Set Table(empty)
Module > General > Command Set Table Length0
Module > Defaults > Command Definitions > Page Program Command0x12
Module > Defaults > Command Definitions > Read Command0x0B
Module > Defaults > Command Definitions > Write Enable Command0x06
Module > Defaults > Command Definitions > Status Command0x05
Module > Defaults > Erase Command Definitions > Sector Erase Command0x2121
Module > Defaults > Erase Command Definitions > Block Erase Command0xDCDC
Module > Defaults > Erase Command Definitions > Chip Erase Command0x6060
Module > Defaults > Dummy Cycles > Memory Read Dummy Cycles3
Module > Defaults > Dummy Cycles > Status Read Dummy Cycles0
Module > High-speed Mode > Auto-Calibration > Data latching delay0
Module > High-speed Mode > Auto-Calibration > Auto-Calibration Address0x90002000
Module > High-speed Mode > Command Definitions > Page Program Command0x1212
Module > High-speed Mode > Command Definitions > Dual Read Command0xEEEE
Module > High-speed Mode > Command Definitions > Write Enable Command0x0606
Module > High-speed Mode > Command Definitions > Status Command0x0505
Module > High-speed Mode > Command Definitions > Sector Erase Command0x2121
Module > High-speed Mode > Command Definitions > Block Erase Command0xDCDC
Module > High-speed Mode > Command Definitions > Chip Erase Command0x6060
Module > High-speed Mode > ProtocolDual data rate OPI (8D-8D-8D)
Module > High-speed Mode > Command Length Bytes2
Module > High-speed Mode > Memory Read Dummy Cycles10
Module > High-speed Mode > Status Read Dummy Cycles4
Module > Chip Select Timing Setting > Command Interval2
Module > Chip Select Timing Setting > Pull-up TimingNo Extension
Module > Chip Select Timing Setting > Pull-down TimingNo Extension
Pins > OM_CS1P104
Pins > OM_DQSP801
Pins > OM_ECSINT1P105
Pins > OM_RESETP106
Pins > OM_SCLKP808
Pins > OM_SIO0P100
Pins > OM_SIO1P803
Pins > OM_SIO2P103
Pins > OM_SIO3P101
Pins > OM_SIO4P102
Pins > OM_SIO5P800
Pins > OM_SIO6P802
Pins > OM_SIO7P804

Timers > Timer, General PWM (r_gpt)

PropertyValue
Common > Pin Output SupportEnabled
Module > General > Nameg_timer_for_ospi_b
Module > General > Channel0
Module > General > ModePeriodic
Module > General > Period0x10000
Module > General > Period UnitRaw Counts
Module > Output > GTIOCA Output EnabledFalse
Module > Output > GTIOCB Output EnabledFalse

Timers > Timer, General PWM (r_gpt)

PropertyValue
Common > Pin Output SupportEnabled
Module > General > Nameg_timer_PWM
Module > General > Channel7
Module > General > ModeSaw-wave PWM
Module > General > Period10
Module > General > Period UnitMilliseconds
Module > Output > Duty Cycle Percent75
Module > Output > GTIOCB Output EnabledTrue
Pins > GTIOCBP404

Note: When setting the GTIOCB pin, ensure that the Operation Mode of the GPT Timer is GTIOCA or GTIOCB, and pin P404 is in Peripheral mode.

Known issues or limitations

  • The external 64 MB Octo-SPI flash memory is not supported in the technology preview.

EK-RA6M3G Getting Started on STM

Available under certain Qt licenses.
Find out more.